Discussion:
[Linuxptp-devel] discrepancy between ptp4l output and oscilloscope readings on Beaglebone Black
Juan Solano
2015-07-29 12:46:34 UTC
Permalink
Hi,

I am learning about PTP and doing tests on 2 Beaglebone Blacks running a
recent stable linux (v3.18.16) with disabled dynamic ticks. They support
hardware timestamping and I have synchronized the system clocks to the
PHC. My logs show what seem to be good values:

ptp4l[4253.258]: master offset -2 s2 freq -3395 path delay
404
ptp4l[4254.258]: master offset -5 s2 freq -3399 path delay
405
ptp4l[4255.258]: master offset 1 s2 freq -3394 path delay
405
ptp4l[4256.258]: master offset -3 s2 freq -3398 path delay
405
ptp4l[4257.259]: master offset 2 s2 freq -3394 path delay
405
ptp4l[4258.259]: master offset -2 s2 freq -3397 path delay
405
ptp4l[4259.259]: master offset 6 s2 freq -3390 path delay
405
ptp4l[4260.259]: master offset -2 s2 freq -3396 path delay
405
ptp4l[4261.259]: master offset 1 s2 freq -3394 path delay
404
ptp4l[4262.259]: master offset 5 s2 freq -3389 path delay
404
ptp4l[4263.259]: master offset 1 s2 freq -3392 path delay
404
ptp4l[4264.259]: master offset 7 s2 freq -3386 path delay
404
ptp4l[4265.259]: master offset 0 s2 freq -3391 path delay
404
ptp4l[4266.259]: master offset -3 s2 freq -3394 path delay
404
ptp4l[4267.259]: master offset 9 s2 freq -3382 path delay
404


However, when comparing the PPS GPIO outputs with an oscilloscope I can
see them varying in a range of +- 800 ns.

Can anybody point me at something obvious that I am missing or how to
investigate further?

Thanks,
Juan.

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Richard Cochran
2015-07-29 14:40:56 UTC
Permalink
Post by Juan Solano
I am learning about PTP and doing tests on 2 Beaglebone Blacks running a
recent stable linux (v3.18.16) with disabled dynamic ticks. They support
hardware timestamping and I have synchronized the system clocks to the
...
Post by Juan Solano
However, when comparing the PPS GPIO outputs with an oscilloscope I can
see them varying in a range of +- 800 ns.
The CPTS in the AM335x does not have any hardware output signals. The
PTP clock cannot be adjusted because of silicon bugs, so we leave the
hardware clock free running and use a software clock as a work around.
Post by Juan Solano
Can anybody point me at something obvious that I am missing or how to
investigate further?
Tell us how you are generating the PPS.

Thanks,
Richard



------------------------------------------------------------------------------
Richard Cochran
2015-07-29 16:17:00 UTC
Permalink
Oops! time to ditch the BBB then. I have written a PPS generator driver
https://github.com/jsln/pps-gen-gpio
Right, so the jitter you are seeing is mostly due to latencies in the
OS. You can improve this a bit by using a PREEMPT_RT kernel.
Do you know of a cheap SBC we can use that supports HW timestamp? Has
anybody had success with Atmel SAMA5D3 chips?
I can't think of any cheap SBC that also has good PTP support.

Sorry,
Richard

------------------------------------------------------------------------------
Chris Healy
2015-07-29 17:08:47 UTC
Permalink
The Freescale MX6 based Sabre boards are inexpensive and have good PTP
support now, don't they? IIRC, recently there was some changes made to
support the HW 1588 block in the MAC that allows the HW to drive a 1588
output pin correctly.

I have not tested this myself yet though but will be doing so in the near
future as I'm working on a design that will depend on it.... ;-)
Post by Richard Cochran
Oops! time to ditch the BBB then. I have written a PPS generator driver
https://github.com/jsln/pps-gen-gpio
Right, so the jitter you are seeing is mostly due to latencies in the
OS. You can improve this a bit by using a PREEMPT_RT kernel.
Do you know of a cheap SBC we can use that supports HW timestamp? Has
anybody had success with Atmel SAMA5D3 chips?
I can't think of any cheap SBC that also has good PTP support.
Sorry,
Richard
------------------------------------------------------------------------------
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Yursen Kim
2015-07-29 17:41:31 UTC
Permalink
We implemented PPS output signal through AM335x Dual-Mode Timer running in
the PWM mode with SCLK frequency.

This is more accurate than software GPIO output because the CPTS on the
AM335x
can generate hardware timestamp event on the rising edge of the DMTimer,
making it possible to synchronize PPS with the CPTS internal clock counter.
Post by Chris Healy
The Freescale MX6 based Sabre boards are inexpensive and have good PTP
support now, don't they? IIRC, recently there was some changes made to
support the HW 1588 block in the MAC that allows the HW to drive a 1588
output pin correctly.
I have not tested this myself yet though but will be doing so in the near
future as I'm working on a design that will depend on it.... ;-)
Post by Richard Cochran
Oops! time to ditch the BBB then. I have written a PPS generator driver
https://github.com/jsln/pps-gen-gpio
Right, so the jitter you are seeing is mostly due to latencies in the
OS. You can improve this a bit by using a PREEMPT_RT kernel.
Do you know of a cheap SBC we can use that supports HW timestamp? Has
anybody had success with Atmel SAMA5D3 chips?
I can't think of any cheap SBC that also has good PTP support.
Sorry,
Richard
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Juan Solano
2015-08-04 07:49:07 UTC
Permalink
thanks for your suggestion, Kim. What kind of values are you
getting? Juan.
Post by Yursen Kim
We implemented PPS output signal through AM335x Dual-Mode Timer
running in the PWM mode with SCLK frequency.
This is more accurate than software GPIO output because the CPTS on
the AM335x can generate hardware timestamp event on the rising edge of
the DMTimer, making it possible to synchronize PPS with the CPTS
internal clock counter.
Post by Chris Healy
The Freescale MX6 based Sabre boards are inexpensive and have good
PTP support now, don't they?  IIRC, recently there was some changes
made to support the HW 1588 block in the MAC that allows the HW to
drive a 1588 output pin correctly. I have not tested this myself yet
though but will be doing so in the near future as I'm working on a
design that will depend on it.... ;-)
On Wed, Jul 29, 2015 at 9:17 AM, Richard Cochran
Oops! time to ditch the BBB then. I have written a PPS
generator driver
https://github.com/jsln/pps-gen-gpio
Post by Chris Healy
Post by Richard Cochran
Right, so the jitter you are seeing is mostly due to latencies in the
OS.  You can improve this a bit by using a PREEMPT_RT kernel.
Post by Yursen Kim
Do you know of a cheap SBC we can use that supports HW timestamp? Has
anybody had success with Atmel SAMA5D3 chips?
Post by Chris Healy
Post by Richard Cochran
I can't think of any cheap SBC that also has good PTP support.
Sorry,
Richard
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Post by Yursen Kim
Post by Chris Healy
Post by Richard Cochran
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Post by Yursen Kim
Post by Chris Healy
https://lists.sourceforge.net/lists/listinfo/linuxptp-devel
Yursen Kim
2015-08-05 15:59:34 UTC
Permalink
If PPS output is generated by Dual-Mode Timer, its accuracy doesn't
depend on any software latencies, so there is no need in RT patches.
However the resolution of DMTimer is limited to 26 MHz (~39 ns).

In our device, the AM335x core is clocked by 19.2 MHz adjustable
oscillator, so the PPS output resolution is ~53 ns. In practice,
DMTimer lowers PPS readings by 20-30 ns.

For example, under the ideal conditions (two devices are connected
directly with a single patch cord), ptp4l reports master offset to be
in the range of +- 15 ns, while the oscilloscope shows +- 30 ns.
thanks for your suggestion, Kim. What kind of values are you getting?
Juan.
We implemented PPS output signal through AM335x Dual-Mode Timer running in
the PWM mode with SCLK frequency.
This is more accurate than software GPIO output because the CPTS on the
AM335x
can generate hardware timestamp event on the rising edge of the DMTimer,
making it possible to synchronize PPS with the CPTS internal clock counter.
The Freescale MX6 based Sabre boards are inexpensive and have good PTP
support now, don't they? IIRC, recently there was some changes made to
support the HW 1588 block in the MAC that allows the HW to drive a 1588
output pin correctly.
I have not tested this myself yet though but will be doing so in the near
future as I'm working on a design that will depend on it.... ;-)
Oops! time to ditch the BBB then. I have written a PPS generator driver
https://github.com/jsln/pps-gen-gpio
Right, so the jitter you are seeing is mostly due to latencies in the
OS. You can improve this a bit by using a PREEMPT_RT kernel.
Do you know of a cheap SBC we can use that supports HW timestamp? Has
anybody had success with Atmel SAMA5D3 chips?
I can't think of any cheap SBC that also has good PTP support.
Sorry,
Richard
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Yursen Kim
2015-08-05 17:00:11 UTC
Permalink
I forgot to mention that this PPS output is linked to the CPTS
internal timestamping counter (ptp clock) but not to the system time.
System clock is still synchronized by phc2sys with software dependent
precision.

This is not a problem for us for now because we use ptp clock for time
critical measurements and system clock for the rest (file i/o, etc.).
However, the work is in progress to achieve better synchronization
between these clocks, perhaps by connecting PPS output to some GPIO
input and by using the RT kernel.
Post by Yursen Kim
If PPS output is generated by Dual-Mode Timer, its accuracy doesn't
depend on any software latencies, so there is no need in RT patches.
However the resolution of DMTimer is limited to 26 MHz (~39 ns).
In our device, the AM335x core is clocked by 19.2 MHz adjustable
oscillator, so the PPS output resolution is ~53 ns. In practice,
DMTimer lowers PPS readings by 20-30 ns.
For example, under the ideal conditions (two devices are connected
directly with a single patch cord), ptp4l reports master offset to be
in the range of +- 15 ns, while the oscilloscope shows +- 30 ns.
thanks for your suggestion, Kim. What kind of values are you getting?
Juan.
We implemented PPS output signal through AM335x Dual-Mode Timer running in
the PWM mode with SCLK frequency.
This is more accurate than software GPIO output because the CPTS on the
AM335x
can generate hardware timestamp event on the rising edge of the DMTimer,
making it possible to synchronize PPS with the CPTS internal clock counter.
The Freescale MX6 based Sabre boards are inexpensive and have good PTP
support now, don't they? IIRC, recently there was some changes made to
support the HW 1588 block in the MAC that allows the HW to drive a 1588
output pin correctly.
I have not tested this myself yet though but will be doing so in the near
future as I'm working on a design that will depend on it.... ;-)
On Wed, Jul 29, 2015 at 9:17 AM, Richard Cochran <
Oops! time to ditch the BBB then. I have written a PPS generator driver
https://github.com/jsln/pps-gen-gpio
Right, so the jitter you are seeing is mostly due to latencies in the
OS. You can improve this a bit by using a PREEMPT_RT kernel.
Do you know of a cheap SBC we can use that supports HW timestamp? Has
anybody had success with Atmel SAMA5D3 chips?
I can't think of any cheap SBC that also has good PTP support.
Sorry,
Richard
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Richard Cochran
2015-07-29 17:51:24 UTC
Permalink
Post by Chris Healy
The Freescale MX6 based Sabre boards are inexpensive and have good PTP
support now, don't they? IIRC, recently there was some changes made to
support the HW 1588 block in the MAC that allows the HW to drive a 1588
output pin correctly.
Aren't the sabre kits in the $800+ range?

In any case, I haven't tested the imx PTP block, and I have my
reservations about it. IIRC, one device had the auxiliary PTP pins
multiplexed with the MAC pins!

The first imx PTP drivers did the clock in SW, because the HW had
issues. Then patches appeared to make the HW work, and then fixes...
Post by Chris Healy
I have not tested this myself yet though but will be doing so in the near
future as I'm working on a design that will depend on it.... ;-)
Let us know how it goes...

Thanks,
Richard

------------------------------------------------------------------------------
Chris Healy
2015-07-29 18:24:41 UTC
Permalink
There's a sabre lite kit that's $199:

http://boundarydevices.com/product/sabre-lite-imx6-sbc/

I understand your reservations, I've been following the commits to the
driver and see . I also know that with the 1588 output, the "pulse" is
only 8ns which is not sufficient for some parts.

Soon enough, I will know more and will share what I learn.
Post by Richard Cochran
Post by Chris Healy
The Freescale MX6 based Sabre boards are inexpensive and have good PTP
support now, don't they? IIRC, recently there was some changes made to
support the HW 1588 block in the MAC that allows the HW to drive a 1588
output pin correctly.
Aren't the sabre kits in the $800+ range?
In any case, I haven't tested the imx PTP block, and I have my
reservations about it. IIRC, one device had the auxiliary PTP pins
multiplexed with the MAC pins!
The first imx PTP drivers did the clock in SW, because the HW had
issues. Then patches appeared to make the HW work, and then fixes...
Post by Chris Healy
I have not tested this myself yet though but will be doing so in the near
future as I'm working on a design that will depend on it.... ;-)
Let us know how it goes...
Thanks,
Richard
Juan Solano
2015-08-04 07:46:54 UTC
Permalink
Richard, thanks for your suggestion. I was using PREEMPT initially, and
with PREEMPT RT I see some improvements, clocks are synchronized in the
+- 250ns range.

Regards,
Juan.
Post by Richard Cochran
Oops! time to ditch the BBB then. I have written a PPS generator driver
https://github.com/jsln/pps-gen-gpio
Right, so the jitter you are seeing is mostly due to latencies in the
OS. You can improve this a bit by using a PREEMPT_RT kernel.
Do you know of a cheap SBC we can use that supports HW timestamp? Has
anybody had success with Atmel SAMA5D3 chips?
I can't think of any cheap SBC that also has good PTP support.
Sorry,
Richard
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